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本人男,6年工作经验,最近3年多做数字IC前段,最早2年多做的系统级别的设计.
主要技能如下:
- Familiar with SoC/ASIC design flow (from spec to chip), be able to handle all the front end work including design and verification.
- Familiar with System Verilog, Verilog hardware language
- Familiar with Debussy, ncverilog, DC, conformal, vncover, nlint, vtran, srambist and other Front end EDA tools
- Familiar with AMBA, TCP/IP Protocol, 802.3 Protocol, USB 2.0, I2C, SPI Protocol, NAND Flash, ZSP (a DSP core of LSI corp)
- Familiar with various kinds of test skills and relevant test tools (such as logic analyzer, spectrum analyzer), able to make test plan for large project and detailed test case
- Familiar with chip test process, test management system and FPGA tools
- Familiar with broad level design, using EDA tool like Protel to design schematic and layout.
- Familiar with C and Assemble language.
总的来说,IC的经验最丰富,板级的数字电路也都可以设计
嵌入式软件也能做,不过不够senior的水平,junior的水平
希望各位兄弟姐妹多多帮忙介绍一下工作 |
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